Order Statistics Based Low-Power Flash ADC with On-Chip Comparator Selection

Low Power Flash ADC

In this paper, a new design for a low power CMOS flash Analog-to-Digital Converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1GHz, is implemented in a 1.2 V analog supply voltage. HSpice simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes less power i n a commercial 90n...

Design of a 45nm TIQ Comparator for High Speed and Low Power 4-Bit Flash ADC

The continued speed improvement of serial links and appearance of new communication technologies, such as ultra-wideband (UWB), have introduced increasing demands on the speed and power specifications of high-speed low-tomedium resolution analog-to-digital converters (ADCs).This paper presents the design of high speed and ultra low power comparator of a 4-bit ADC. The comparator used is Thresho...

Low Power Encoder and Comparator Design of 5-bit Flash Adc

A Low Power Comparator Design for 6-Bit Flash ADC in 90-Nm CMOS

The main focus of this paper is to design a “Low power Flash ADC” for ultra-wide band applications using CMOS 90nm technology. Flash ADC consists of a reference generator, array of comparators, 1-out-of N code generator, Fat tree encoder and output D latches. The demanding issues in the design of a low power flash ADC is the design of low power latched comparator. The proposed comparator in thi...

Design of Flash ADC using Improved Comparator Scheme

This Paper introduced a 4 bit Flash Analog to Digital converter. The propose ADC consist of the comparators and the MUX based decoder. Propose Comparator eliminate the use of resistor ladder in the circuit. All the input of comparators are connected to the common input node. Depending upon the internal voltage of comparator and the input voltage output may be “0” or “1” known as thermometer cod...